The Ethernet is a widely-installed local area network (LAN) technology. An Ethernet LAN typically uses coaxial cable or special grades of twisted pair wires. Commonly installed Ethernet systems are called 10BASE-T and provide transmission speeds up to 10 megabytes per second (mbps). Alternatively, fast Ethernet, or 100BASE-T, provides transmission speeds up to 100 megabytes per second. The nomenclature can be explained as follows. The “10” indicates 10 mbps. The “BASE” means a base band network. The “T” indicates a twisted pair of wires. The “100” indicates a speed of 100 mbps.
A function called Auto-Negotiation is a part of the Ethernet standard. Auto-negotiation (AN) makes it possible for devices to exchange information about their abilities over a link segment. This, in turn, allows the devices to perform automatic configuration to achieve the best possible mode of operation over a link. At the least, AN can provide automatic speed matching for multi-speed devices at each end of a link. Multi-speed Ethernet interfaces can then take advantage of the highest speed offered by a multi-speed hub port.
The AN function takes control of the physical communications channel, e.g., twisted pair of wires, when a connection is established to a network device, i.e., when a local link partner attempts to connect to a remote link partner. The AN function detects the various modes that are supported by the remote link partner while advertising which modes it supports, i.e., the modes supported by the local link partner. The AN function will automatically switch to the correct technology, such as 10BASE-T, 100BASE-T, etc., or a corresponding full duplex mode. Once the highest performance common mode is determined, AN passes control of the physical connection to the appropriate technology and becomes transparent until the connection is broken.
The AN function takes place using fast link pulse (FLP) signals. These signals are a modified version of the normal link pulse (NLP) signals used for verifying link integrity, as defined in the original 10BASE-T specifications. The FLP signals are mainly a burst of NLPs (also known as link test pulses (LTPs) in 10BASE-T terminology).
Each FLP includes, among other things, 16 positions corresponding to data pulses. The 16 data positions in an FLP burst form a 16-bit word known as a link code word (LCW). The breakdown of the bit positions in the LCW is shown in the following table.
D0D1D2D3D4D5D6D7D8D9D10D11D12D13D14D15S0S1S2S3S4A0A1A2A3A4A5A6A7RFAckNPSelector FieldTechnology Ability Fieldwhere
BitTechnologyRelative PriorityA010Base-T Half DuplexLowestA110Base-T Full DuplexA2100Base-TX Half DuplexA3100Base-TX Full DuplexHighest
The selector field indicates the appropriate version of the IEEE Standard. The technology ability Field includes 8 bits. These bits are what advertise a device's link capabilities to a remote link partner. The AN protocol contains rules for device configuration based upon bits A0-A3. This is how, e.g., a hub and the device attached to that hub can automatically negotiate and configure themselves to use the highest performance mode of operation.
The AN protocol is designed to work with 100BASE-TX interfaces that do not support FLPs and AN as well as older 10BASE-T interfaces that were built before AN existed. The AN function includes an optional management interface that allows the AN function to be disabled.
The AN function can operate with older, or legacy, LANs due to an aspect of its operation known as the parallel detection function. The parallel detection function accounts for the case where only one end of a physical connection has the AN capability, e.g., the remote link partner does not have AN capability. For example, consider FIG. 1, which depicts a network 100 (according to the Background Art) having a hub 102, a node A 104 and a node B 106. The hub 102 supports both 10BASE-T and 100BASE-TX modes and has AN capability. The node 104 supports both 10BASE-T and 100BASE-TX modes and has AN capability. Accordingly, the node 104 and the hub 102 will use AN to connect at 100BASE-TX mode. In contrast, the node 106 only supports 10BASE-T mode and does not have AN capability. The hub 102 will fall back to the parallel detection function in order to connect successfully with node 106 in the 10BASE-T mode.
In more detail, the hub 102 recognizes that the node 106 (namely, its remote link partner) does not have AN capability. Instead of exchanging configuration information, the hub 102 (via the parallel detection function) examines the signals that it receives from the node 106. If the hub 102 determines that it supports a mode in common with the node 106, then it will connect at the highest speed mode supported commonly by both itself and the node 106.
The AN protocol provides for the entire range of twisted pair Ethernet segments as well as full duplex Ethernet links. Full duplex Ethernet is a variant of Ethernet technology. In contrast to normal Ethernet, devices at each end of a full duplex link can send and receive data simultaneously over the link. This theoretically can double the bandwidth of a normal, i.e., half duplex, Ethernet link.
A basic hardware configuration for the AN function according to the Background Art is schematically illustrated in FIG. 2. A physical layer (PHY) is provided that includes a manage interface (I/F) block 22, an AN block 20, and a physical media attachment (PMA) unit 204. The manage I/F block 22 is provided for interfacing with a medium access control (MAC) layer that is positioned just above the physical layer and includes a management data input/output interface (I/F) 205 and a register block 206. The AN block 20 substantially carries out the auto-negotiation in the physical layer. The AN function exchanges signals with remote link partners via TX and RX signals going to and coming from the PMA 204.
The AN block 20 includes a transmitter 201, an arbiter 202, and a receiver 203. The MAC layer includes a MAC register block 208 and a MAC management data input/output (MDIO) interface (I/F) unit 207. If the power is on, a MAC management block 209, which is typically part of a driver software (S/W) layer, undertakes a predetermined operation to place the PHY layer into a desired mode. That is, after the power-on, the MAC management block 209 of the driver S/W layer sets a value in the PHY register 208 A (within the MAC register block 206). Responding to the signal from the MAC management block 209, the MAC MDIO I/F 207 transfers a signal to a PHY MDIO I/F 205. The PHY MDIO I/F 205 sets values in corresponding registers of a PHY register block 206 into the desired mode.
The PHY register block 206 according to the Background Art is depicted in more detail in FIG. 3A. It includes an ANAR 301, an ANLPAR 302 and an ANER 303. The ANAR (Auto-Negotiation Advertisement Register) 301 indicates information about the capabilities of the local station/link-partner, and is set initially by hardware control or by driver software. The bit pattern of FIG. 3B is as follows.                Bit 8: TXFD—100 BASE—Informing whether TX Full Duplex is supported        Bit 7: TXHD—100 BASE—Informing whether TX Half Duplex is supported        Bit 6: 10FD—10 BASE—Informing whether T Full duplex is supported        Bit 5: 10HD—10 BASE—Informing whether T Half duplex is supported        Bit 4: 0: Selector 00001: Informing that CSMA/CD 802.3 protocol is supported        
The ANLPAR (Auto-Negotiation Link Partner Advertisement Register) 302 indicates information about the capabilities of the remote station/link-partner and represents the values obtained from the FLP signals received from the AN block 20. Each bit pattern of FIG. 3C is as follows.                Bit 8: TXFD—100 BASE—Indicates whether TX Full duplex is supported        Bit 7: TXHD—100 BASE—Indicates whether TX Half duplex is supported        Bit 6: 10FD—10 BASE—Indicates whether T Full duplex is supported        Bit 5: 10HD—10 BASE—Indicates whether T Half duplex is supported        Bit 4: 0: Selector 00001: Indicates that CSMA/CD 802.3 is supported        
The ANER (Auto-Negotiation Expansion Register) 303 stores the status information arising from executing the AN function. Each bit pattern of FIG. 3D is as follows.                Bit 4: PDF—Informing of Occurrence of Parallel Detection Fault        Bit 3: LP_NP_ABLE—Informing that the Link Partner is able to conduct the Next Page function        Bit 2: NP_ABLE—Informing that the local station is able to conduct the Next Page function        Bit 1: PAGE_RX—Informing of having received an FLP different from the prior one        Bit 0: LP_AN_ABLE—Informing of that the Link Partner is operable in the AN        
The modes of operation supported, e.g., 10M/100M, Full/Half, Auto-Negotiation Enable, etc., are indicated by the bit patterns of the ANAR 301 in the PHY register block 206. The Arbiter 202, when enabled to conduct AN, transmits the information of the ANAR 301 in the PHY register block 206 to the transmitter 201 via the signal tx_LCW. And the FLP is transmitted by transmitter 201 to the remote link partner via the PMA 204. In other words, each field of the FLP has the values of the ANAR 301. The receiver 203 accepts information in the form of FLP signals from the link partner via the PMA 204. The arbiter 202 receives information, which is obtained from the received FLP signals, via the signal rx_LCW from the receiver 203, and then stores it into the ANLPAR 302 of the register block 206.
If both partners can conduct the AN, this is indicated to the arbiter 202 via the signal link_status from the PMA 204.
FIG. 4 is a flow chart depicting the typical steps involved in the auto-negotiation function according to the Background Art. Flow begins at step 401, where the arbiter 202 checks whether the AN function is currently enabled, i.e., whether the AN function continues or stops. If yes, flow proceeds to step 402 where the local link partner transmits FLP signals to the remote link partner. From step 402 flow proceeds to decision step 403 where the receiver 203 determines whether the remote link partner has sent FLP signals. If so, then the receiver 203 sets the flag abi_match to the state indicating YES and provides the abi_match flag to the arbiter 202. If not, then the AN function begins the parallel detection function (to be discussed below).
The “YES” branch from step 403 leads to step 404, where the arbiter 202 transmits additional FLP signals, i.e., additional LCWs, to the remote link partner via the transmitter 201 and the PMA unit 204. The remote link partner also transmits additional FLP signals, i.e., additional LCWs to the arbiter 202 via the PMA unit 204 and the receiver 203. After a predetermined number of FLP signals have been exchanged, the arbiter receives a signal rx_LCW from the receiver 203 that represents the link code word of the remote link partner. The arbiter 202 writes this information into the ANLPAR register 302 of the PHY register block 206. Flow proceeds to decision step 405, where the arbiter 202 compares bits B5-B8 of its own ANAR 301 against bits B5-B8 of the ANLPAR 302 (which represent the capabilities of the remote link partner). If one or more of the respective bits B5-B8 have a logic-one value, then the arbiter 202 will select the highest performance common mode that had a match and will establish a link connection (step 406) to the remote link partner. If none of bits B 5 -B 8 have a logic-one match, then the AN function ends in failure.
FIG. 5 expands upon FIG. 4 to include the steps of parallel detection according to the Background Art. Differences in FIG. 5 with respect to FIG. 4 will be discussed. Flow begins in FIG. 5 at step 401, where the arbiter 202 determines whether the AN function is enabled. If so, then flow proceeds to step 402 and onto step 403 as in FIG. 4. If the outcome of decision step 403 is YES, then flow proceeds as in FIG. 4. But if the answer at decision step 403 is NO, flow proceeds to step 502. In other words, if it is determined at step 403 that no FLP signals have been received from the remote link partner, the abi_match parameter is set to indicate a logic NO state and is sent to the arbiter 202 from the receiver 203. Then the arbiter 202 checks the value of the link_status parameter sent from the PMA unit 204 to the arbiter 202, i.e., the arbiter 202 checks whether only simple NLPs have been received. If so, then the arbiter 202 assumes that the remote link partner can only support half duplex mode at step 503.
Flow proceeds to step 504, where the arbiter 202 sets the link_control parameter to indicate 10BASE-T half duplex operation and sends the parameter to the remote link partner via the PMA unit 204. Flow proceeds to decision step 505, where the arbiter 202 receives the reply from the remote link partner via the PMA unit 204 as conveyed by the link_status parameter. The arbiter 202 updates the ANLPAR 302 with the remote link partner's reply information. Then the arbiter 202 again compares bits B5-B8 of its ANAR 301 against bits B5-B8 of the ANLPAR 302. If a match exists, then a link connection is established at step 506. But if no match is found, then the parallel detection function ends in failure (step 507).
Alternatively, in step 401, if the AN function is not enabled, flow proceeds to step 501, where the arbiter 202 causes the transmitter 201 and PMA unit 204 to send normal link pulses (NLPs) to the remote link partner. Flow proceeds from step 501 to step 502, as discussed above.
To restate, the parallel detection function uses normal link pulses (NLPs). But NLPs do not include duplex information.